Imec is mapping a staged shift from pluggable optical modules to co-packaged and wafer-level photonics as AI drives bandwidth, power and copper constraints across data centres.
The surging appetite for AI computing is forcing the data centre industry to rethink a long-held assumption: that copper can carry ever greater volumes of traffic at ever higher speeds. Imec argues that the answer is not simply faster electrical links, but a staged move towards optics that sit progressively closer to the silicon, from front-panel modules to package-level integration and, eventually, to optical fabrics built directly into the wafer stack. That shift is being driven by a sharp rise in bandwidth demand across cloud, AI and high-performance computing, where data must move not only between racks and buildings, but also inside servers, between accelerators, memory and other components.
The pressure is not only technical but also energetic. Gartner has forecast that AI-optimised servers will consume 175TWh in 2026, rising to 258TWh in 2027, at which point they are expected to overtake conventional data centre hardware in power use. At the same time, analysts have warned that the wider AI build-out is increasing strain on copper supply, with the International Energy Agency estimating that existing and planned mines may cover only around 70% of projected 2035 demand. For network operators, those trends reinforce the same conclusion: as speeds move towards 800G and 1.6T Ethernet, copper links become harder to sustain because signal loss rises, reach falls and thicker cables become increasingly unwieldy.
In the near term, pluggable optical transceivers remain the industry’s most practical answer. According to imec, they still offer the best combination of modularity, serviceability and multi-vendor compatibility, which is why they continue to underpin hyperscale networking. The roadmap is moving from 400G and 800G towards first-generation 1.6T modules built around 200Gbps lanes, with 3.2T systems seen as the next major milestone. Silicon photonics remains central to that progression, but imec says the next step will require more than incremental tuning. It points to heterogeneous integration of materials such as lithium niobate and lithium tantalate, including work based on micro-transfer printing, as a route to modulators that can exceed the bandwidth limits of conventional silicon devices.
Imec says it has already demonstrated two notable advances in that direction. Working with Ghent University, researchers reported a 320Gbps unamplified optical link over 2km of single-mode fibre using transfer-printed lithium niobate modulators on a silicon photonics platform, alongside a germanium photodiode, custom drivers and transimpedance amplifiers. The team also reported the first heterogeneous integration of a lithium tantalate modulator on a silicon photonic integrated circuit. These devices are still relatively large, but imec sees them as a credible path for scaling pluggable optics, where footprint constraints are less severe than in tightly packed co-packaged designs.
The more aggressive push is towards co-packaged optics, where the optical engine sits alongside the switching or compute chip rather than at the front panel. Imec says that approach shortens electrical paths from centimetres to millimetres, improves signal integrity and reduces latency while avoiding the power cost of heavy digital signal processing. Its research targets include optical engines reaching 6.4T and eventually 12.8T, lane rates of 400Gbps, bandwidth densities near 1Tbps per millimetre and energy efficiency as low as 3pJ per bit in future generations. It also points to packaging technologies such as 2.5D interposers, through-silicon vias, fan-out wafer-level packaging and hybrid bonding as critical enablers.
For the longer term, imec is looking beyond the package to what it calls 3D integrated optics, where photonic layers are stacked directly with compute silicon. That architecture is aimed at the most demanding AI systems, where bandwidth densities may need to exceed 10Tbps per millimetre and latency must fall below 100ns. The concept remains at an earlier research stage, but imec says the necessary building blocks are taking shape, including high-bandwidth electro-optic materials, laser integration and wafer-scale alignment techniques. The timing reflects a broader industry pattern: pluggables continue to evolve for immediate deployment, co-packaged optics are nearing broader adoption from around 2027 or 2028, and 3D integrated optics are still several years from commercial scale.
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