India’s shift to network-centric warfare has made semiconductor independence a security imperative, with defence scientists warning that imported chips could compromise missiles, air-defence systems and other advanced platforms.
India’s growing reliance on networked weapons is exposing a strategic weakness that senior defence scientists say can only be closed if the country learns to make semiconductors from design to packaging onshore. At a panel at SRM Presents The Hindu Semiconductor Summit 2026, former DRDO director general V.K. Saraswat said the shift from platform-centred warfare to network-centric operations has made chips part of the combat system itself, rather than a simple component hidden inside it. He said India’s BrahMos cruise missile, the proposed Sudarshan Chakra air defence shield and other advanced systems will remain vulnerable if critical chips continue to be imported.
Dr Saraswat said the Sudarshan Chakra concept would knit together satellite, sea, air and land sensors through artificial intelligence-enabled software, but argued that saturation attacks and drone swarms would demand still more advanced layers of defence. He said 28-nanometre chips may be adequate for some current uses, but future systems, especially artificial intelligence at the edge and large language model applications, will require nodes at 5 nanometres, 3 nanometres and even 2 nanometres.
A. Sivathanu Pillai, founder, chief executive and managing director of BrahMos Aerospace, said precision guidance is where semiconductors become decisive. He said a BrahMos missile can alter its trajectory within milliseconds after receiving a target’s coordinates, and that the intelligence behind such a manoeuvre comes from processors and software. He also pointed to the Light Combat Aircraft Mark 2 and Chandrayaan-3 as examples of how heavily India’s high-end systems still depend on imported electronics.
The gap, both men argued, is not just about the chips themselves but about the wider industrial base. Dr Pillai said India is still largely operating around the 28-nanometre level in defence systems while the global frontier has moved to 3 nanometres. He added that waiting for a domestic 3-nanometre capability around 2030 to 2035 would be too late for present security needs. He also warned that restrictions on materials, devices and chip-making equipment are likely to tighten further.
Deleep Nair, a professor of electrical engineering at the Indian Institute of Technology Madras, traced India’s fabrication problem back decades. He said India had received CMOS technology from the Radio Corporation of America before Taiwan did, but that Semiconductor Complex Limited in Chandigarh was later left behind after a fire in the late 1980s. He said the most advanced process currently in use there is 180 nanometres, a level comparable to what major global chipmakers were using in the mid-1990s. He also noted that the Defence Research and Development Organisation’s Gallium Arsenide Enabling Technology Centre works on gallium arsenide and gallium nitride, materials that matter for high-frequency defence electronics.
The security risk, Dr Saraswat said, is not theoretical. He recalled how supplies of the 8086 and 8087 processors used in the first Prithvi missile were cut once the Integrated Guided Missile Development Programme became public, and then tightened further under the Missile Technology Control Regime. He argued that a weapon can be compromised if a flaw is introduced during fabrication, citing the Stuxnet episode as a warning that hardware, software and supply chains can all be attacked before a system is even fielded. Foreign cloud infrastructure and external positioning systems create similar exposure, he said, because a network-centric weapon tied to outside services is only as secure as the weakest link in that chain.
The panel’s prescription was a full domestic ecosystem under the India Semiconductor Mission, covering materials, design, fabrication, equipment, packaging and human resources. The scientists also called for research-and-development fabs in Indian Institutes of Technology and other universities, modelled on Belgium’s Interuniversity Microelectronics Centre, so that India does not repeatedly have to import the next generation of chip technology. Dr Pillai said India already accounts for a fifth of global chip design capability and urged a far larger push to expand that share, including into packaging and testing.
There are signs of movement. Dr Nair said the Tata fab coming up in Gujarat, through a technology licence from Taiwan’s Powerchip Semiconductor Manufacturing Corporation, will bring the 40-nanometre node into India, which can support many applications. The government has also approved additional semiconductor units under its manufacturing programme, while Electronics and Information Technology Minister Ashwini Vaishnaw has said India is working towards domestically designed and manufactured 3-nanometre chips by 2032. Even so, the scientists warned that India remains far behind in critical minerals, stockpiling and advanced lithography equipment, where waiting times are already measured in years.
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