Intel signals a strategic shift with focus on next-generation memory stacking and packaging

Intel is reinvigorating its memory ambitions, signalling a move towards tightly integrated memory and logic systems to meet AI and data centre demands, with new leadership and advanced packaging concepts on the horizon.

Intel is signalling a renewed push into memory technology, with chief executive Lip-Bu Tan indicating that future CPU designs may increasingly rely on memory stacked directly on the same package as the processor. In remarks reported by Tom’s Hardware and in Intel’s own leadership announcement, Tan said the company sees memory as an area needing fresh architectural ideas, rather than a mature commodity business. He also suggested that Intel is now willing to revisit a field it once viewed with caution.

That shift appears to be reflected in personnel as well as strategy. Intel has appointed Seok-Hee Lee, the former head of SK hynix, to lead its advanced packaging work at Intel Foundry, reporting directly to Tan. According to Intel, Lee will oversee advanced packaging, system integration and back-end technology development. Tom’s Hardware reported that the hire underlines Intel’s interest in combining memory and logic more closely for AI hardware, where packaging has become a critical competitive battleground.

The timing matters. In data-centre AI systems, the pressure is no longer only on compute but on the speed and efficiency of memory delivery. Shorter connections between processor and memory can reduce latency and improve throughput, which is why rivals such as Samsung and SK hynix are also pursuing more tightly integrated designs. Samsung has been discussing stacked memory concepts for its own next-generation HBM roadmap, while SK hynix has recently highlighted thermal improvements in its iHBM work, showing how central packaging and heat management have become to the sector.

For Intel, the exact architecture remains unclear, but Tom’s Hardware pointed to two possible tracks. One is Cross-Batch Memory, or XBM, a patent-backed concept that would aim to reduce the cost and complexity of conventional high-bandwidth memory by avoiding a silicon interposer. The other is Z-Angle Memory, or ZAM, developed with SoftBank’s Saimemory, which is being positioned as a longer-term rival to HBM. Prototypes for ZAM are not expected before 2027, suggesting Intel’s memory ambitions are still at an early stage, even if the company now appears serious about building them into its next wave of packaging technology.