After years of retreat, Intel revisits memory technology, unveiling new architectures and investments that could reshape AI data centre hardware and renew its strategic foothold in the memory market.
Intel appears to be edging back towards a market it once helped to define. In remarks on the TechSurge podcast, chief executive Lip-Bu Tan signalled that memory is once again central to the company’s thinking, arguing that the field is no longer a simple commodity business and still leaves room for meaningful architectural change. Tom’s Hardware reported that he also suggested Intel could explore ways of stacking memory on top of a CPU, a direction that would fit the industry’s broader move towards tighter integration between logic and memory in AI systems.
That interest comes after years in which Intel steadily unwound much of its memory exposure. TechTarget reported that the company ended Optane, its storage-class memory line based on 3D XPoint, after it failed to gain commercial traction. Intel also sold its NAND flash business to SK Hynix in 2020, leaving the company with little direct presence in memory manufacturing even as AI workloads have made bandwidth and power efficiency more valuable. The shift is notable because, as Tan has implied, memory is increasingly viewed as a strategic bottleneck rather than a low-margin afterthought.
The memory story also matters because Intel is not coming to it as a blank slate. The company’s early history included major commercial DRAM and SRAM products, but it retreated from DRAM in the mid-1980s after losing ground to Japanese manufacturers. It later tried again with Rambus and with Optane, and both efforts fell short of expectations. That history explains why any renewed push will be judged cautiously, even if the current market is very different from the one Intel left behind.
What is drawing attention now is Intel’s reported work on new architectures. Tom’s Hardware says a patent for Cross-Batch Memory, or XBM, describes a design intended to avoid the cost and packaging complexity of high-bandwidth memory by using serial UCIe links and backend-of-line transistor structures rather than a silicon interposer. The same report says the concept includes built-in repair features and a package layout designed to reduce height and simplify assembly, but it remains a proposal rather than a product roadmap.
Intel is also linked to a separate effort with Saimemory, a SoftBank subsidiary, on Z-Angle Memory, or ZAM. According to Tom’s Hardware and PCWorld, the project involves vertically stacked DRAM aimed at AI data centres, with claims of higher capacity, greater bandwidth and lower power use than current HBM designs. PCWorld reported that prototypes are expected in 2027 and commercial availability around 2030, although that timetable remains tentative. For now, the broader significance is less about any single technology than about Intel’s apparent willingness to revisit memory as part of its wider AI and foundry strategy.
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