Google’s expanded deal with Marvell marks a significant move in AI infrastructure, extending beyond tensor processing units to a comprehensive data centre approach, amid a new emphasis on customised hardware for inference and data movement.
Google’s expanded agreement with Marvell Technology points to a broader shift in how hyperscalers build AI infrastructure. According to Marvell, the relationship now reaches beyond tensor processing units to include AI inference accelerators, storage controllers, network interface controllers, memory interface controllers and near-memory compute. That widens the scope of Google’s custom-silicon strategy from a single accelerator line into the wider data centre stack. The deal also includes a warrant for nearly 59 million Marvell shares at $206.58 each, with vesting tied to qualifying purchases that could support as much as $120 billion in cumulative revenue through fiscal 2033. Marvell has said revenue through fiscal 2028 was already reflected in its earlier outlook, with the bigger effect likely to come later.
The significance of the pact is not simply its size. Analysts cited by EE Times said it suggests Google is extending the logic behind the TPU into memory, networking and storage, rather than limiting custom silicon to compute alone. Brendan Burke of Futurum Group described the arrangement as one that “expands the pie”, arguing that Google is adding specialised chips around the TPU rather than replacing its existing supplier base. He said Broadcom is likely to remain involved in the core TPU programme, while Marvell takes on adjacent workloads and supporting infrastructure.
That matters because AI systems are becoming increasingly sensitive to data movement, not just raw accelerator throughput. Marvell chief executive Matt Murphy has said the company has long expected customisation to spread to “every hop in the network”, and he told investors that the industry is now starting to reflect that view. The shift is especially relevant as AI spending moves from training giant models towards inference, where the economics of tokens, power consumption and latency become central.
The deal also highlights why hyperscalers can pursue custom silicon more aggressively than smaller cloud providers. Carmen Li, chief executive of Silicon Data and Compute Exchange, told EE Times that major platforms often sell outcomes such as latency, throughput or service cost, rather than a named chip. That gives them room to choose the most economical hardware underneath. But Li also cautioned that not every workload suits an ASIC. Stable, forecastable tasks are easier to tailor, while fast-changing multimodal applications still favour general-purpose GPUs. In practice, that points to a mixed fleet: custom chips where workloads are predictable, and GPUs where flexibility still matters.
For Google, Marvell adds both engineering depth and bargaining leverage. Burke said the distinction is between defining what a chip should do and turning that concept into a manufacturable system, with partners contributing expertise in serdes, packaging, HBM integration and foundry execution. He also argued that a second credible design partner gives Google more negotiating power alongside Broadcom. Marvell, meanwhile, gains access to a potentially vast revenue stream, though the size of that opportunity will depend on how far Google pushes the partnership. As Li put it, both custom silicon and GPUs can still grow strongly. The larger change may be that custom silicon is no longer confined to the TPU; it is spreading across the rest of the AI data centre too.
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