India advances semiconductor ambitions with comprehensive policy and giant investments

India formally launches Semicon 2.0, signalling a shift from ambition to implementation with ₹1,27,500 crore support, a new industrial strategy, and a focus on developing domestic design, manufacturing, and talent to cut reliance on imports and build global competitive strengths.

India has moved its semiconductor policy from ambition to rulebook. On 31 August 2026, New Delhi formally notified Semicon 2.0 with an outlay of ₹1,27,500 crore, setting eligibility rules and fiscal support across chip design, manufacturing, equipment, materials, advanced packaging, research and talent development. The programme is structured around six pillars and 10 categories, with the India Semiconductor Mission acting as the nodal agency and support available for as long as six years. (business-standard.com)

That shift matters because the government’s own strategy no longer treats semiconductors as a simple factory-building exercise. NITI Aayog’s 10-year roadmap, released on 29 May 2026, says India still imports about 90-95% of its semiconductor requirements and wants to turn that dependence into a domestic value chain worth USD 120-150 billion by 2035. In the official launch note, finance minister Nirmala Sitharaman described the plan as “a clear declaration of India’s intent” to move from major buyer to indispensable player in the global supply chain. (pib.gov.in)

The strategy is also narrower, and more pragmatic, than a race for the most advanced chips. The roadmap argues that India should avoid chasing the global wafer race from behind and instead build strength in mature-node logic, compound semiconductors and advanced packaging. It targets more than 100 advanced semiconductor design IPs, leadership in wide-bandgap materials such as silicon carbide and gallium nitride, and a top-three global position in outsourced semiconductor assembly and test, or OSAT. The New Indian Express reported that this “More-than-Moore” approach also envisages wafer fabrication centred on roughly 28nm to 65nm technologies, with 35-50% self-sufficiency in demand and 55-70% local value capture by 2035. (niti.gov.in)

The clearest industrial test of that approach is Tata Electronics’ project at Dholera, Gujarat. Tata and ASML signed their memorandum of understanding on 16 May 2026 to equip what the companies describe as India’s first front-end commercial semiconductor fab, a 300mm facility backed by USD 11 billion. ASML’s lithography systems, which imprint circuit patterns on silicon wafers, are expected to support a plant designed for 50,000 wafers a month. Tom’s Hardware, citing the companies’ statement, reported that Taiwan’s Powerchip Semiconductor Manufacturing Corporation is licensing 28nm, 40nm, 55nm, 90nm and 110nm process technologies for the site, pointing to a product mix aimed at automotive, mobile, communications and AI-related markets rather than bleeding-edge processors. (asml.com)

Talent sits at the centre of that calculation, and both policymakers and industry now describe it as a production constraint, not a side issue. The Tata-ASML tie-up includes local training, supply-chain resilience work and research infrastructure. ASML chief executive Christophe Fouquet said the company was “committed to establishing long-term partnerships in the region”, while Tata chief executive Randhir Thakur said the collaboration would help “develop talent locally”. NITI Aayog’s roadmap goes further, proposing a four-layer National Semiconductor Talent Pyramid and a National Fab Academy staffed by experienced industry specialists to train cleanroom-ready technicians, manufacturing and packaging engineers, materials researchers and system architects. (economictimes.indiatimes.com)

Semicon 2.0’s financing shows why the government is emphasising the full stack. A silicon wafer fab can claim 40% support on eligible capital expenditure, but a 300mm applicant must show capacity of at least 40,000 wafer starts a month, minimum capital investment of ₹20,000 crore and revenue of ₹7,500 crore in at least one of the previous three financial years. Compound, photonics, sensor and discrete semiconductor fabs can receive 35% support. Advanced packaging projects qualify for 35%, legacy packaging for 25%, while talent-development and advanced semiconductor R&D projects can receive support of up to 75% of project cost. The scheme also offers seed funding of up to ₹15 crore for eligible semiconductor design start-ups and MSMEs. (business-standard.com)

Even on the government’s own projections, execution will demand far more than subsidy announcements. The roadmap estimates cumulative investment needs of USD 135-180 billion over the next decade and suggests public backing of roughly USD 45-60 billion to draw in private capital. It calls for long-term partnerships with the US, EU, Japan and South Korea to reduce exposure to export controls and geopolitical disruption. In a sign of how infrastructure-heavy this industry remains, the same document even recommends exploring small modular reactors to provide dedicated power to semiconductor fabrication clusters. (newindianexpress.com)

Industry groups have welcomed the speed with which the government moved from Cabinet approval in July 2026 to a formal notification at the end of August. Ashok Chandak, president of IESA and SEMI India, called the notification “a very significant milestone”. But the harder test begins now: whether India can translate one flagship fab and a cluster of packaging projects into durable strengths in design IP, materials, tooling and skilled labour. The policy architecture now reflects that broader reality. India’s semiconductor push will be judged less by one plant opening than by whether it can build a system that designs, equips, packages and runs chips at scale. (business-standard.com)