Japan clears TSMC’s first domestic 3nm chip plant in Kumamoto

Japan has approved TSMC’s revised plan to produce advanced 3nm chips at its second Kumamoto factory, upgrading the site from its earlier focus on mature semiconductor technologies.

Japan’s Ministry of Economy, Trade and Industry has approved Taiwan Semiconductor Manufacturing Co’s revised plan to build 3nm chips at its second factory in Kumamoto, a move that would make Japan home to its first domestically produced 3nm semiconductors, according to reports from the Japanese and Taiwanese press. The decision marks a significant upgrade from the plant’s earlier plan to make more mature 6nm and 12nm devices.

The change follows TSMC’s announcement in February that the new Kumamoto site would shift to a 3nm process, reflecting stronger demand for high-performance chips used in artificial intelligence and other advanced computing applications. The second plant is still under construction next to the company’s first Kumamoto fab, and the new plan reduces initial monthly output to 6,000 wafers, far below the scale originally envisaged for the site.

According to reporting cited by Stockhub and Japanese media, METI has set aside 732 billion yen in subsidy requests for fiscal 2027, with the final production scale expected to depend on how much public support is ultimately approved. The revised plan also affects the first Kumamoto plant, which will stop making 12nm to 16nm chips and instead concentrate on 22nm to 28nm production at 45,000 wafers a month.

The second fab is now scheduled to begin production in December 2028. The broader investment in the two Kumamoto plants is expected to exceed 3.5 trillion yen, while Kumamoto governor Kimura Keiji has welcomed the approval as a boost to what local officials describe as a new phase of regional renewal. Analysts say the shift underlines Japan’s effort to move further into the leading edge of semiconductor manufacturing rather than remain focused on older process nodes.